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TERADYNE J750EX
  • TERADYNE J750EX
  • TERADYNE J750EX
  • TERADYNE J750EX
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OEM 모델 설명
The J750Ex is a low cost, high efficiency parallel test system for advanced microcontrollers and consumer SoC package test & wafer sort. It is built on the foundation of the J750, one of the most successful test platforms in ATE history. The J750Ex provides highly economical parallel test solutions for high-performance microcontrollers, consumer SoC devices, and digital wafer sort applications. It offers high parallel test configuration with 50% higher throughput and 99% parallel test efficiency. All J750 systems are DIB compatible and can run tens of thousands of J750 test programs. The J750Ex has a range of features including up to 1024 digital pins, 96 device power supplies, and analog test capability, as well as enhanced DFT capability with 196 Gbit scan depth and deep diagnostic capture. It also has a per-pin test architecture, pattern-controlled instrumentation, and flexible site mapping with no slot boundaries. The system is air-cooled and has a “Zero footprint” tester-in-a-test-head design for minimum floor space.
문서

문서 없음

카테고리
Final Test

마지막 검증일: 60일 이상 전

주요 품목 세부 정보

조건:

Used


작동 상태:

알 수 없음


제품 ID:

106100


웨이퍼 사이즈:

알 수 없음


빈티지:

알 수 없음


Have Additional Questions?
Logistics Support
Available
Money Back Guarantee
Available
Transaction Insured by Moov
Available
Refurbishment Services
Available
유사 등재물
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TERADYNE

J750EX

verified-listing-icon
검증됨
카테고리
Final Test
마지막 검증일: 60일 이상 전
listing-photo-bcf98d5db25b43fa9ce48a8b3be4faf0-https://d2pkkbyngq3xpw.cloudfront.net/moov_media/3.0-assets/photo-coming-soon-small.png
주요 품목 세부 정보

조건:

Used


작동 상태:

알 수 없음


제품 ID:

106100


웨이퍼 사이즈:

알 수 없음


빈티지:

알 수 없음


Have Additional Questions?
Logistics Support
Available
Money Back Guarantee
Available
Transaction Insured by Moov
Available
Refurbishment Services
Available
설명
설명 없음
환경 설정
환경 설정 없음
OEM 모델 설명
The J750Ex is a low cost, high efficiency parallel test system for advanced microcontrollers and consumer SoC package test & wafer sort. It is built on the foundation of the J750, one of the most successful test platforms in ATE history. The J750Ex provides highly economical parallel test solutions for high-performance microcontrollers, consumer SoC devices, and digital wafer sort applications. It offers high parallel test configuration with 50% higher throughput and 99% parallel test efficiency. All J750 systems are DIB compatible and can run tens of thousands of J750 test programs. The J750Ex has a range of features including up to 1024 digital pins, 96 device power supplies, and analog test capability, as well as enhanced DFT capability with 196 Gbit scan depth and deep diagnostic capture. It also has a per-pin test architecture, pattern-controlled instrumentation, and flexible site mapping with no slot boundaries. The system is air-cooled and has a “Zero footprint” tester-in-a-test-head design for minimum floor space.
문서

문서 없음

유사 등재물
모두 보기