설명
설명 없음환경 설정
환경 설정 없음OEM 모델 설명
The Eclipse Mark IV is the latest generation PVD tool from the highly successful Eclipse family. It offers the lowest Cost-of-Ownership through high throughput, a small footprint, and high reliability with exceptional process performance. The system achieves high throughput in a high vacuum environment through the use of serial wafer handling, resulting in 80% fewer wafer transfers than a traditional cluster tool. The Eclipse Mark IV has a footprint of 44 square feet and can be configured for etch or deposition, providing full capability for today’s contact, barrier, interconnect, resistor, and packaging films for Silicon, GaAs and CCD substrates. Wafer temperature is regulated by backplane heaters and the chambers have world class vacuum leak rates and base pressures.문서
문서 없음
TEL / MRC
ECLIPSE MARK IV
검증됨
카테고리
PVD / Sputtering
마지막 검증일: 60일 이상 전
주요 품목 세부 정보
조건:
Used
작동 상태:
알 수 없음
제품 ID:
79339
웨이퍼 사이즈:
6"/150mm
빈티지:
알 수 없음
Have Additional Questions?
Logistics Support
Available
Money Back Guarantee
Available
Transaction Insured by Moov
Available
Refurbishment Services
Available
TEL / MRC
ECLIPSE MARK IV
카테고리
PVD / Sputtering
마지막 검증일: 60일 이상 전
주요 품목 세부 정보
조건:
Used
작동 상태:
알 수 없음
제품 ID:
79339
웨이퍼 사이즈:
6"/150mm
빈티지:
알 수 없음
Logistics Support
Available
Money Back Guarantee
Available
Transaction Insured by Moov
Available
Refurbishment Services
Available
설명
설명 없음환경 설정
환경 설정 없음OEM 모델 설명
The Eclipse Mark IV is the latest generation PVD tool from the highly successful Eclipse family. It offers the lowest Cost-of-Ownership through high throughput, a small footprint, and high reliability with exceptional process performance. The system achieves high throughput in a high vacuum environment through the use of serial wafer handling, resulting in 80% fewer wafer transfers than a traditional cluster tool. The Eclipse Mark IV has a footprint of 44 square feet and can be configured for etch or deposition, providing full capability for today’s contact, barrier, interconnect, resistor, and packaging films for Silicon, GaAs and CCD substrates. Wafer temperature is regulated by backplane heaters and the chambers have world class vacuum leak rates and base pressures.문서
문서 없음