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B/IOEM 모델 설명
High-Power Burn-In System For 150-Watt VLSI Devices Micro Control Company announces its new HPB-2 high-power burn-in system. The HPB-2 was designed to meet the challenge of wide variations in heat dissipation and the diverse burn-in needs created by high-power VLSI devices of up to 150 watts. The HPB-2 provides precise, individual temperature control for each device under test while supporting a wide range of test strategies. Features -Burn-in and test up to 150-watt VLSI devices -Individual device under test temperature control to within ±3˚ C -128 I/O channels per driver/receiver -Programmable temperature control from 50˚ C to 150˚ C -ASIC architecture for per-pin timing, testing, and formatting -Timing on the fly, programmable edges and rep-rate with 10-nanosecond -resolution -8 vector formats per pin per cycle -Up to 50 amps of programmable power to the device under test -Clock rate of 2 to 400 MHz, programmable문서
문서 없음
카테고리
Electronic Test
마지막 검증일: 60일 이상 전
주요 품목 세부 정보
조건:
Used
작동 상태:
알 수 없음
제품 ID:
102918
웨이퍼 사이즈:
알 수 없음
빈티지:
알 수 없음
Logistics Support
Available
Transaction Insured by Moov
Available
Refurbishment Services
Available
MICRO CONTROL COMPANY / MCC
HPB-2
카테고리
Electronic Test
마지막 검증일: 60일 이상 전
주요 품목 세부 정보
조건:
Used
작동 상태:
알 수 없음
제품 ID:
102918
웨이퍼 사이즈:
알 수 없음
빈티지:
알 수 없음
Logistics Support
Available
Transaction Insured by Moov
Available
Refurbishment Services
Available
설명
설명 없음환경 설정
B/IOEM 모델 설명
High-Power Burn-In System For 150-Watt VLSI Devices Micro Control Company announces its new HPB-2 high-power burn-in system. The HPB-2 was designed to meet the challenge of wide variations in heat dissipation and the diverse burn-in needs created by high-power VLSI devices of up to 150 watts. The HPB-2 provides precise, individual temperature control for each device under test while supporting a wide range of test strategies. Features -Burn-in and test up to 150-watt VLSI devices -Individual device under test temperature control to within ±3˚ C -128 I/O channels per driver/receiver -Programmable temperature control from 50˚ C to 150˚ C -ASIC architecture for per-pin timing, testing, and formatting -Timing on the fly, programmable edges and rep-rate with 10-nanosecond -resolution -8 vector formats per pin per cycle -Up to 50 amps of programmable power to the device under test -Clock rate of 2 to 400 MHz, programmable문서
문서 없음